Project 01 / Simulation results

Can adaptive filtering
and a small network clean audio?

I built MHDA as a fixed-point SystemVerilog audio denoiser that combines an adaptive filter with a compact neural network.

SystemVerilog · Python · Q1.15 Datapath ● Patent disclosure package prepared

The problem

The goal is to reduce noise in audio using adaptive filtering and a learned correction. I’m exploring underwater audio and voice as potential use cases.

The design

An 8-tap RLS stage feeds an 8→128→384→128→1 MLP. The datapath uses signed Q1.15 fixed-point arithmetic with 40-bit accumulation. The target clock is 100 MHz. Any implementation results will need to be checked against the same fixed-point reference.

Architecture: Reference input → 8-tap RLS filter → MLP residual correction → Denoised output.

The result and its limits

RLS contribution: 5.0818 dB reported improvement.
MLP contribution: 3.7095 dB reported improvement.
Total reported SNR improvement: 8.7913 dB.
Maximum hardware/software error in report: 2.62 LSB.

The simulation report shows an 8.7913 dB SNR improvement and a maximum hardware/software error of 2.62 LSB. These results come from the report’s test signals and fixed-point reference model. They are not measurements from fabricated silicon.

What I’m working on next

I still need to reproduce the results from a clean checkout and keep the reference model’s fixed-point behavior intact. RTL simulation and any future ASIC results will be reported separately. I’ve prepared a patent disclosure package, but no patent has been granted.

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