Founder & Captain · Chip Designers Guild
I lead student RTL, verification, FPGA, and ASIC projects at VIT Chennai. The guild is affiliated with the VLSI Society of India.
R&D Intern · Sentrix Robotics
I’m working on an STM32-based platform that collects tactile and environmental data for Physical AI research. Its prototype latency is below 50 ms.
Founder · TapeItOut
I’m building tools to automate open-source ASIC flows and report quality of results, including DRC and LVS checks.
B.Tech · Electronics & Communication Engineering
Specialization in VLSI Design & Technology. Current CGPA: 8.29 / 10.